1. Field of the Invention
The invention generally relates to a method of fabricating a node contact window, and more particularly to a method of fabricating a node contact window of dynamic random access memory (DRAM).
2. Description of the Related Art
As semiconductor process approaches to a line width of 0.25 .mu.m, the width of word lines, bit lines and node contacts, as well as the distance between word lines, bit lines and node contact are reduced. In the fabrication method of DRAM, word lines and source/drain regions beside word lines are formed on a substrate and bit lines are formed to electrically connect with the source/drain region. Word lines and bit lines are insulated by a dielectric layer, and a node contact window is formed to expose the source/drain region by etching through the dielectric layer. Since the design rule reduces gradually, the width of the node contact window is reduced to cause a high aspect ratio node contact window. It is difficult for the dielectric layer to be etched through to expose the source/drain region. As a result, a capacitor formed in a subsequent process can not be electrically connected to the source/drain region.
FIG. 1 is a cross-sectional structure of a node contact window. Devices (not shown) are formed on a substrate 104, and a dielectric layer 102 covers on these devices. Bit lines 108 are formed within a dielectric layer 106 on the dielectric layer 102. A cap layer 110 and a nitride spacer 112 are formed respectively on the top and the sidewalls of bit lines 108. A nitride layer 114 is then formed on the dielectric layer 106. Since the etching rate of the dielectric layer 106, 102 is different from that of the nitride spacer 112, a self-aligned contact process is performed to form a node contact window 116 while patterning the nitride layer 114 and the dielectric layer 106, 102. The substrate 104 is thus exposed.
If the etching selectivity of the dielectric layer 106/nitride spacer 112 is high, the etching step is easy to stop on the nitride spacer 112 and therefore bit lines 108 are protected by the nitride spacer 112 from being damaged. But the dielectric layer 102 is hard to be etched through to expose the substrate 104 due to the increased aspect ratio of the node contact window. In the other hand, if a low etching selectivity of the dielectric layer 106/nitride spacer 112 is used, the dielectric layer 102 can be etched through during etching step. But the nitride spacer 112 can not protect bit lines 108, as a result bit lines 214 are damaged and the process of fabricating the node contact window failed.